1. Field of the Invention
The present invention relates to a plasma display panel, and in particular to a method for removing impurities of a plasma display panel which is capable of shortening a panel aging time.
2. Description of the Prior Art
In general, according to development and popularization of information processing system, importance of a display apparatus as a visual information transfer means has been increased.
In the conventional display apparatus, a CRT (cathode ray tube) is bulky and has an image distortion problem due to an earth magnetic field. In the meantime, recent various display apparatus aim for oversize, flatness, high brightness, high efficiency in screen. Accordingly, researches on various flat panel displays have been actively going on. For example, in the flat panel display, a LCD (liquid crystal display), a FED (field emission display) and a PDP (plasma display panel), etc. have been developed.
The PDP (plasma display panel) displays pictures including character or graphic by radiating fluorescent material by ultraviolet rays generated in discharge of a mixed gas such as He+Xe, Ne+Xe and He+Ne+Xe, etc. Thinning and scale-up of the PDP can be easily achieved. Because the PDP has a simple structure, it is easy to fabricate. In addition, it has a higher brightness and luminous efficiency in comparison with other flat panel displays. Because of those advantages, researches on PDP have been actively going on. In particular, in a three electrodes alternating current surface discharge type PDP, because wall electric charge is accumulated on the surface in discharge and electrodes are protected from sputtering in discharge, it is possible to perform a low voltage operation and have a long life span.
FIG. 1 is a sectional view illustrating discharge cells of a general three electrodes alternating current surface discharge type plasma display panel.
As depicted in FIG. 1, an upper panel includes an upper glass substrate 10; a sustain electrode 12 making a pair and formed at the bottom surface of the upper glass substrate 10; a dielectric layer 14 for maintaining surface electric charge in discharge of the sustain electrode 12; and a protecting film 16 for protecting the dielectric layer 14 from discharge.
In addition, a lower panel includes a lower glass substrate 26; an address electrode 22 formed at the top surface of the lower glass substrate 26; a lower dielectric layer 24 formed at the whole top surface of the address electrode 22; a separation wall 20 formed at the top surface of the lower dielectric layer 24 in parallel with the address electrode 22; and a fluorescent material 18 coated onto the separation wall 20 and radiating visible rays by excitation of ultraviolet rays.
The fabrication process of the general three electrodes alternating current surface discharge type plasma display panel will be described.
The sustain electrodes 12 are arranged at the bottom surface of the upper glass substrate 10 in parallel. In more detail, the sustain electrode 12 consists of an ITO (indium tin oxide) electrode 12A and a bus electrode 12B which are pasted in Cr/Cu/Cr or silver (Ag). The sustain electrode 12 supplies a scan signal for address discharge and a sustain signal for sustain discharge. The dielectric layer 14 for electric, charge is coated onto the upper panel on which the sustain electrode 12 is arranged by a screen printing method, and a protecting film 16 is formed on the surface of the dielectric layer 14.
Herein, the protecting film 16 extends a life of the dielectric layer 14, improves secondary electron discharge efficiency and reduces discharge characteristics variation of fireproof metal due to oxide contamination by protecting the dielectric layer 14 from the sputtering phenomenon of plasma particles. A MgO (magnesium oxide) film is mainly used as the protecting film 16.
In addition, the fabrication method of the lower panel will be described.
In the lower panel, the address electrode 22 is formed by the screen printing method. The address electrode 22 supplies a data signal for address discharge. The lower dielectric layer 24 is formed at the top surface of the lower glass substrate 26 on which the address electrode 22 is formed. The separation wall 20 is formed on the top surface of the dielectric layer 12 on which the address electrode 22 is formed by the screen printing method or a sand blast method so as to be parallel with the address electrode 22. In more detail, the separation wall 20 provides a discharge space inside the discharge cells in order to cut off electrical and optical interference between discharge cells and performs a function for supporting the upper panel and the lower panel.
The fluorescent material 18 for generating visible rays is formed onto the surface of the lower dielectric layer 24 in which the address electrode 22 is formed and the separation wall 20 by the screen printing method.
Afterward, the fabrication of the three electrodes alternating current surface discharge type PDP is completed through the processes shown in FIG. 2.
FIG. 2 is a flow chart illustrating the fabrication processes of the general alternating current surface discharge type PDP.
First, the upper panel and the lower panel are fabricated as shown at step ST1. Second, in an assembling process, seal agent is coated onto the upper panel and the lower panel, and they are temporarily fixed. Afterward, the temporarily fixed upper panel and lower panel are put into a calcining furnace, are heated at about 450° C. as a melting point of the seal agent, and accordingly the upper panel and lower panel are adhered to each other as shown at step ST2. Third, in an exhausting and discharge gas-injecting process, the internal portion of the adhered upper and lower panels is vacuumized, and several mg inert gas as a mixed gas of Ne, Xe, He, etc. is injected therein as shown at step ST3. Last, a panel aging process is performed as shown at step ST4. In the panel aging process, to prevent driving voltage increase and luminous stain phenomenon due to contamination and oxidation, etc. on the surface of the electrodes occurred in the panel fabrication process, the electrode surface (namely, insulating layer) is uniformed so as to get good discharge characteristics and reduce a driving voltage. In addition, the panel aging process is for examining condemned panel in the early stage by applying an appropriate voltage to a panel or securing reliability of a panel through device voltage stabilization, a time required for the panel aging process is about 24 hours.
However, in mass production of the PDP, the panel aging process causes a bottle neck phenomenon in which lots of time and cost are consumed, and accordingly a PDP device production time and cost may increase.